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instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

  • (computer science) the process of carrying out an instruction by a computer
      Synonym:execution

    双语例句

    • But in reality, the upper software drives the underlying hardware, for example different instruction execution and data access affect the underlying hardware circuit directly and result in different power generation.
      但在实际情况中,底层硬件受上层软件驱动,例如不同指令执行和数据存取等软件指令直接影响底层硬件的电路活动,导致不同功耗产生。
    • The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated.
      采用了两种存储器体系结构,寻址方式的模拟不仅保证了正确地确定操作数,而且能够正确统计指令执行时间。
    • The model of instruction level parallel program execution
      指令级并行程序执行模型
    • In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the video processing instruction.
      为有效实现扩展指令,处理器执行级采用了可扩展流水级技术。
    • This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
      本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系,并分析了新型超标量RISC结构的实现方案,其中包括具有单个执行部件和多个执行部件的结构。
    • Pipeline is dealing with instruction, including instruction decode, issue, and execution.
      流水线正在处理指令,包括指令解码、发布和执行。
    • As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
      作为SOC的核心,CPU的性能主要取决于指令的执行效率,而采用流水线方式大大增加了指令的执行速度,提高了CPU的性能。
    • It is more efficient to design a simple instruction set that enable the execution of one instruction per clock cycle.
      设计一个能够在一个时钟周期执行一条指令的简单指令系统才是更有效的。
    • A4-stage instruction pipeline for instruction execution makes at-speed test possible.
      四级指令流水线的引入使全速测试成为可能。
    • Traditional programming model like C, C++ and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure.
      C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。